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» Comparing the Optimal Performance of Parallel Architectures
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ICANN
2011
Springer
14 years 5 months ago
Hybrid Parallel Classifiers for Semantic Subspace Learning
Subspace learning is very important in today's world of information overload. Distinguishing between categories within a subset of a large data repository such as the web and ...
Nandita Tripathi, Michael P. Oakes, Stefan Wermter
FPGA
2009
ACM
343views FPGA» more  FPGA 2009»
15 years 8 months ago
Fpga-based face detection system using Haar classifiers
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kas...
LCPC
2004
Springer
15 years 7 months ago
Branch Strategies to Optimize Decision Trees for Wide-Issue Architectures
Abstract. Branch predictors are associated with critical design issues for nowadays instruction greedy processors. We study two important domains where the optimization of decision...
Patrick Carribault, Christophe Lemuet, Jean-Thomas...
MICRO
2000
IEEE
176views Hardware» more  MICRO 2000»
15 years 1 months ago
An Advanced Optimizer for the IA-64 Architecture
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
Rakesh Krishnaiyer, Dattatraya Kulkarni, Daniel M....
132
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SIGGRAPH
1994
ACM
15 years 6 months ago
IRIS performer: a high performance multiprocessing toolkit for real-time 3D graphics
This paper describes the design and implementation of IRIS Performer, a toolkit for visual simulation, virtual reality, and other real-time 3D graphics applications. The principal...
John Rohlf, James Helman