1461 search results - page 59 / 293 » Comparing the Optimal Performance of Parallel Architectures |
127
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HIPC
2000
Springer
15 years 5 months ago
2000
Springer
Many scientific applications manipulate large amount of data and, therefore, are parallelized on high-performance computing systems to take advantage of their computational power a...
134
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CGO
2004
IEEE
15 years 5 months ago
2004
IEEE
To meet the high demand for powerful embedded processors, VLIW architectures are increasingly complex (e.g., multiple clusters), and moreover, they now run increasingly sophistica...
NIPS
1996
15 years 3 months ago
1996
A central theme of computational vision research has been the realization that reliable estimation of local scene properties requires propagating measurements across the image. Ma...
131
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ISPDC
2010
IEEE
15 years 9 days ago
2010
IEEE
—Super-scalar, out-of-order processors that can have tens of read and write requests in the execution window place significant demands on Memory Level Parallelism (MLP). Multi- ...
ICCAD
2005
IEEE
15 years 10 months ago
2005
IEEE
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...