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ASPDAC
2008
ACM
91views Hardware» more  ASPDAC 2008»
15 years 6 months ago
Heuristic power/ground network and floorplan co-design method
It's a trend to consider power supply integrity at early stage to improve the design quality. In this paper, we propose a novel algorithm to optimize floorplan together with P...
Xiaoyi Wang, Jin Shi, Yici Cai, Xianlong Hong
DCC
2008
IEEE
15 years 6 months ago
Design and Implementation of a High-Performance Microprocessor Cache Compression Algorithm
Researchers have proposed using hardware data compression units within the memory hierarchies of microprocessors in order to improve performance, energy efficiency, and functional...
Xi Chen, Lei Yang, Haris Lekatsas, Robert P. Dick,...
APVIS
2006
15 years 6 months ago
Spatial analysis of centralization and decentralization in the population migration network
Although overcrowded and the depopulation of the population are one of the social issues in Japan, the complex mechanisms are not comprehended. Then, we tried to show this phenome...
S. Tomita, Y. Hayashi
ISCAPDCS
2001
15 years 6 months ago
Performance Evaluation of a Non-Blocking Multithreaded Architecture for Embedded, Real-Time and DSP Applications
This paper presents the evaluation of a non-blocking, decoupled memory/execution, multithreaded architecture known as the Scheduled Dataflow (SDF). The major recent trend in digit...
Krishna M. Kavi, Joseph Arul, Roberto Giorgi
ADHOC
2007
67views more  ADHOC 2007»
15 years 4 months ago
Threshold-related throughput - A new criterion for evaluation of sensor network performance
Energy efficient and power aware protocols are of utmost importance in Sensor Networks. The most popular criteria, so far, for evaluating performance of energy-aware protocols are...
Ilya Ledvich, Adrian Segall