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» Compiler Architectures for Heterogeneous Systems
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CASES
2010
ACM
15 years 2 months ago
Instruction selection by graph transformation
Common generated instruction selections are based on tree pattern matching, but modern and custom architectures feature instructions, which cannot be covered by trees. To overcome...
Sebastian Buchwald, Andreas Zwinkau
CASES
2003
ACM
15 years 9 months ago
Reducing code size with echo instructions
In an embedded system, the cost of storing a program onchip can be as high as the cost of a microprocessor. Compressing an application’s code to reduce the amount of memory requ...
Jeremy Lau, Stefan Schoenmackers, Timothy Sherwood...
PPDP
1999
Springer
15 years 8 months ago
A Virtual Machine for a Process Calculus
Abstract. Despite extensive theoretical work on process-calculi, virtual machine specifications and implementations of actual computational models are still scarce. This paper pre...
Luís M. B. Lopes, Fernando M. A. Silva, Vas...
DATE
2011
IEEE
223views Hardware» more  DATE 2011»
14 years 7 months ago
Towards a Time-predictable Dual-Issue Microprocessor: The Patmos Approach
Current processors are optimized for average case performance, often leading to a high worst-case execution time (WCET). Many architectural features that increase the average case...
Martin Schoeberl, Pascal Schleuniger, Wolfgang Puf...
ASPDAC
2006
ACM
127views Hardware» more  ASPDAC 2006»
15 years 10 months ago
Memory size computation for multimedia processing applications
– In real-time multimedia processing systems a very large part of the power consumption is due to the data storage and data transfer. Moreover, the area cost is often largely dom...
Hongwei Zhu, Ilie I. Luican, Florin Balasa