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ICCAD
2008
IEEE
97views Hardware» more  ICCAD 2008»
16 years 1 months ago
Integrated code and data placement in two-dimensional mesh based chip multiprocessors
— As transistor sizes continue to shrink and the number of transistors per chip keeps increasing, chip multiprocessors (CMPs) are becoming a promising alternative to remain on th...
Taylan Yemliha, Shekhar Srikantaiah, Mahmut T. Kan...
SENSYS
2009
ACM
15 years 11 months ago
Run time assurance of application-level requirements in wireless sensor networks
Continuous and reliable operation of WSNs is notoriously difficult to guarantee due to hardware degradation and environmental changes. In this paper, we propose and demonstrate a ...
Jingyuan Li, Yafeng Wu, Krasimira Kapitanova, John...
CODES
2007
IEEE
15 years 11 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
IPSN
2007
Springer
15 years 10 months ago
Harbor: software-based memory protection for sensor nodes
Many sensor nodes contain resource constrained microcontrollers where user level applications, operating system components, and device drivers share a single address space with no...
Ram Kumar, Eddie Kohler, Mani B. Srivastava
SIGSOFT
2006
ACM
15 years 10 months ago
Bit level types for high level reasoning
Bitwise operations are commonly used in low-level systems code to access multiple data fields that have been packed into a single word. Program analysis tools that reason about s...
Ranjit Jhala, Rupak Majumdar