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CASES
2007
ACM
15 years 8 months ago
Lightweight barrier-based parallelization support for non-cache-coherent MPSoC platforms
Many MPSoC applications are loop-intensive and amenable to automatic parallelization with suitable compiler support. One of the key components of any compiler-parallelized code is...
Andrea Marongiu, Luca Benini, Mahmut T. Kandemir
DATE
2004
IEEE
122views Hardware» more  DATE 2004»
15 years 8 months ago
Phase Coupled Code Generation for DSPs Using a Genetic Algorithm
The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting special hardware features. Due to the irregular arc...
Markus Lorenz, Peter Marwedel
FASE
2008
Springer
15 years 6 months ago
Language-Based Optimisation of Sensor-Driven Distributed Computing Applications
In many distributed computing paradigms, especially sensor networks and ubiquitous computing but also grid computing and web services, programmers commonly tie their application to...
Jonathan J. Davies, Alastair R. Beresford, Alan My...
ERSA
2006
186views Hardware» more  ERSA 2006»
15 years 6 months ago
The Case for High Level Programming Models for Reconfigurable Computers
In this paper we first outline and discuss the issues of currently accepted computational models for hybrid CPU/FPGA systems. Then, we discuss the need for researchers to develop ...
David L. Andrews, Ron Sass, Erik Anderson, Jason A...
JSA
2008
74views more  JSA 2008»
15 years 4 months ago
Resource conflict detection in simulation of function unit pipelines
Processor simulators are important parts of processor design toolsets in which they are used to verify and evaluate the properties of the designed processors. While simulating arch...
Pekka Jääskeläinen, Vladimír...