2607 search results - page 77 / 522 » Complete Functional Synthesis |
129
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ACSD
2004
IEEE
15 years 7 months ago
2004
IEEE
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
DATE
2006
IEEE
15 years 9 months ago
2006
IEEE
Structured-ASIC design provides a mid-way point between FPGA and cell-based ASIC design for performance, area and power, but suffers from the same increasing verification burden a...
117
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ETFA
2006
IEEE
15 years 9 months ago
2006
IEEE
Abstract. In this paper, reverse partially-marked safe net condition/event systems (RsNCES) are introduced, rules of their functioning are defined and convenient interpretation met...
155
Voted
FPL
2000
Springer
15 years 7 months ago
2000
Springer
This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state as...
158
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JAR
2008
15 years 3 months ago
2008
This article presents detailed implementations of quantifier elimination for both integer and real linear arithmetic for theorem provers. The underlying algorithms are those by Coo...