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122
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ICCD
2005
IEEE
120views Hardware» more  ICCD 2005»
16 years 12 days ago
Novel Low-Overhead Operand Isolation Techniques for Low-Power Datapath Synthesis
: Power consumption in datapath modules due to redundant switching is an important design concern for high-performance applications. Operand isolation schemes are adopted to reduce...
Nilanjan Banerjee, Arijit Raychowdhury, Swarup Bhu...
ICCAD
2007
IEEE
87views Hardware» more  ICCAD 2007»
16 years 11 days ago
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
Philip Brisk, Ajay K. Verma, Paolo Ienne
141
Voted
FPL
2007
Springer
137views Hardware» more  FPL 2007»
15 years 9 months ago
Multi-processor System-level Synthesis for Multiple Applications on Platform FPGA
Multiprocessor systems-on-chip (MPSoC) are being developed in increasing numbers to support the high number of applications running on modern embedded systems. Designing and progr...
Akash Kumar, Shakith Fernando, Yajun Ha, Bart Mesm...
UML
1998
Springer
15 years 7 months ago
Automating the Synthesis of UML StateChart Diagrams from Multiple Collaboration Diagrams
The use of scenarios has become a popular technique for requirements elicitation and specification building. Since scenarios capture only partial descriptions of system behavior, ...
Ismaïl Khriss, Mohammed Elkoutbi, Rudolf K. K...
148
Voted
DATE
2004
IEEE
109views Hardware» more  DATE 2004»
15 years 7 months ago
RTL Processor Synthesis for Architecture Exploration and Implementation
Architecture description languages are widely used to perform architecture exploration for application-driven designs, whereas the RT-level is the commonly accepted level for hard...
Oliver Schliebusch, Anupam Chattopadhyay, Rainer L...