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ASPDAC
2005
ACM
113views Hardware» more  ASPDAC 2005»
15 years 9 months ago
Scalable interprocedural register allocation for high level synthesis
Abstract— The success of classical high level synthesis has been limited by the complexity of the applications it can handle, typically not large enough to necessitate the depart...
Rami Beidas, Jianwen Zhu
ISCA
2012
IEEE
279views Hardware» more  ISCA 2012»
13 years 5 months ago
Staged memory scheduling: Achieving high performance and scalability in heterogeneous systems
When multiple processor (CPU) cores and a GPU integrated together on the same chip share the off-chip main memory, requests from the GPU can heavily interfere with requests from t...
Rachata Ausavarungnirun, Kevin Kai-Wei Chang, Lava...
ICIP
2006
IEEE
16 years 5 months ago
Scalable Video Transmission Using Double Binary Turbo Code
In this paper, we propose a novel efficient scheme for robust video transmission over wireless channels. The schema consists of motion compensated spatio-temporal wavelet decompos...
Naeem Ramzan, Ebroul Izquierdo
111
Voted
ICNP
1999
IEEE
15 years 7 months ago
Minimum Rate Guarantee Without Per-Flow Information
This paper introduces a scalable maxmin flow control protocol which guarantees the minimum rate for each connection-oriented flow without requiring per-flow information. The proto...
Yuseok Kim, Wei Kang Tsai, Mahadevan Iyer, Jordi R...
122
Voted
ICPR
2010
IEEE
15 years 5 months ago
Fast Training of Object Detection Using Stochastic Gradient Descent
Training datasets for object detection problems are typically very large and Support Vector Machine (SVM) implementations are computationally complex. As opposed to these complex ...
Rob Wijnhoven, Peter H. N. De With