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NOCS
2009
IEEE
15 years 4 months ago
A GALS many-core heterogeneous DSP platform with source-synchronous on-chip interconnection network
This paper presents a many-core heterogeneous computational platform that employs a GALS compatible circuit-switched on-chip network. The platform targets streaming DSP and embedd...
Anh T. Tran, Dean Truong, Bevan M. Baas
IPPS
2007
IEEE
15 years 4 months ago
POET: Parameterized Optimizations for Empirical Tuning
The excessive complexity of both machine architectures and applications have made it difficult for compilers to statically model and predict application behavior. This observatio...
Qing Yi, Keith Seymour, Haihang You, Richard W. Vu...
APCCAS
2006
IEEE
229views Hardware» more  APCCAS 2006»
15 years 3 months ago
Low Power Combinational Multipliers using Data-driven Signal Gating
— A data driven approach to design and optimization of low power combinational multipliers is presented. This technique depends on signal gating to avoid un-necessary computation...
Nima Honarmand, Ali Afzali-Kusha
ICCS
2004
Springer
15 years 3 months ago
Evolutionary State Assignment for Synchronous Finite State Machines
: Synchronous finite state machines are very important for digital sequential designs. Among other important aspects, they represent a powerful way for synchronizing hardware comp...
Nadia Nedjah, Luiza de Macedo Mourelle
IWQOS
2011
Springer
14 years 19 days ago
Dexferizer: A service for data transfer optimization
— We present an approach to optimizing the transfer of data objects within a user’s collection of computers and personal devices, subject to a variety of user-defined quality ...
Ercan Ucan, Timothy Roscoe