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ISPD
2010
ACM
249views Hardware» more  ISPD 2010»
15 years 4 months ago
A matching based decomposer for double patterning lithography
Double Patterning Lithography (DPL) is one of the few hopeful candidate solutions for the lithography for CMOS process beyond 45nm. DPL assigns the patterns less than a certain di...
Yue Xu, Chris Chu
CLUSTER
2008
IEEE
15 years 4 months ago
Empirical-based probabilistic upper bounds for urgent computing applications
—Scientific simulation and modeling often aid in making critical decisions in such diverse fields as city planning, severe weather prediction and influenza modeling. In some o...
Nick Trebon, Peter H. Beckman
ACMDIS
2000
ACM
15 years 2 months ago
Meta-Design: Design for Designers
One fundamental challenge for the design of the interactive systems of the future is to invent and design environments and cultures in which humans can express themselves and enga...
Gerhard Fischer, Eric Scharff
VLSI
2010
Springer
14 years 8 months ago
Design of low-complexity and high-speed digital Finite Impulse Response filters
—In this paper, we introduce a design methodology to implement low-complexity and high-speed digital Finite Impulse Response (FIR) filters. Since FIR filters suffer from a larg...
Diego Jaccottet, Eduardo Costa, Levent Aksoy, Paul...
DAC
2003
ACM
15 years 3 months ago
Realizable RLCK circuit crunching
Reduction of an extracted netlist is an important pre-processing step for techniques such as model order reduction in the design and analysis of VLSI circuits. This paper describe...
Chirayu S. Amin, Masud H. Chowdhury, Yehea I. Isma...