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VLSID
2007
IEEE
120views VLSI» more  VLSID 2007»
16 years 3 months ago
VLSI Architecture for Matrix Inversion using Modified Gram-Schmidt based QR Decomposition
Chitranjan K. Singh, Sushma Honnavara Prasad, Pora...
VLSID
2006
IEEE
111views VLSI» more  VLSID 2006»
16 years 3 months ago
An Area Efficient Mixed-Signal Test Architecture for Systems-on-a-Chip
Hari Vijay Venkatanarayanan, Michael L. Bushnell
EUROPAR
2009
Springer
15 years 9 months ago
A Multilevel Parallelization Framework for High-Order Stencil Computations
Stencil based computation on structured grids is a common kernel to broad scientific applications. The order of stencils increases with the required precision, and it is a challeng...
Hikmet Dursun, Ken-ichi Nomura, Liu Peng, Richard ...