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119
Voted
IPPS
1998
IEEE
15 years 7 months ago
A Parallel Algorithm for Minimum Cost Path Computation on Polymorphic Processor Array
This paper describes a new parallel algorithm for Minimum Cost Path computation on the Polymorphic Processor Array, a massively parallel architecture based on a reconfigurable mesh...
Pierpaolo Baglietto, Massimo Maresca, Mauro Miglia...
106
Voted
IPPS
1998
IEEE
15 years 7 months ago
Experimental Validation of Parallel Computation Models on the Intel Paragon
Experimental data validating some of the proposed parallel computation models on the Intel Paragon is presented. This architecture is characterized by a large bandwidth and a rela...
Ben H. H. Juurlink
132
Voted
DAC
1999
ACM
15 years 7 months ago
Dynamically Reconfigurable Architecture for Image Processor Applications
This work presents an overview of the principles that underlie the speed-up achievable by dynamic hardware reconfiguration, proposes a more precise taxonomy for the execution mode...
Alexandro M. S. Adário, Eduardo L. Roehe, S...
COMPCON
1996
IEEE
15 years 7 months ago
Architecture of a Broadband MediaProcessor
A broadband mediaprocessor is a general-purpose computer system which reaches the goal of communicating and processing at broadband rates using compiled software rather than speci...
Craig Hansen
ISWC
1999
IEEE
15 years 7 months ago
The Conference Assistant: Combining Context-Awareness with Wearable Computing
We describe the Conference Assistant, a prototype mobile, context-aware application that assists conference attendees. We discuss the strong relationship between context-awareness...
Anind K. Dey, Daniel Salber, Gregory D. Abowd, Mas...