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IPPS
1994
IEEE
15 years 8 months ago
Building Multithreaded Architectures with Off-the-Shelf Microprocessors
Present-day parallel computers often face the problems of large software Overheadsfor process switching and interprocessor communication. These problems are addressed by the Multi...
Herbert H. J. Hum, Kevin B. Theobald, Guang R. Gao
CCGRID
2004
IEEE
15 years 8 months ago
A resource allocation architecture with support for interactive sessions in utility Grids
Utility Grids implemenf a virtuuliiarion architecture and nl- lowfor sharing of infrastructure for improved Rerum on invesrmenr(RO1J.Wc consider extending the existing Grid infrus...
Vanish Talwar, Bikash Agarwalla, Sujoy Basu, Raj K...
IJNSEC
2008
106views more  IJNSEC 2008»
15 years 4 months ago
Parallel Hardware Architectures for the Cryptographic Tate Pairing
Identity-based cryptography uses pairing functions,which are sophisticated bilinear maps defined on elliptic curves.Computing pairings efficiently in software is presently a relev...
Guido Marco Bertoni, Luca Breveglieri, Pasqualina ...
CLUSTER
2009
IEEE
15 years 2 months ago
MITHRA: Multiple data independent tasks on a heterogeneous resource architecture
With the advent of high-performance COTS clusters, there is a need for a simple, scalable and faulttolerant parallel programming and execution paradigm. In this paper, we show that...
Reza Farivar, Abhishek Verma, Ellick Chan, Roy H. ...
ISLPED
1998
ACM
84views Hardware» more  ISLPED 1998»
15 years 8 months ago
Low power architecture of the soft-output Viterbi algorithm
CT This paper investigates the low power implementation issues of the soft-output Viterbi algorithm (SOVA), a building block for turbo codes. By briefly explaining the theory of t...
David Garrett, Mircea R. Stan