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» Computer aided analysis and design of power transformers
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DAC
2002
ACM
16 years 2 months ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
ICIP
1995
IEEE
16 years 3 months ago
Parallel programmable video co-processor design
Modern video applications call for computationally intensive data processing at very high data rate. In order to meet the high-performance/low-cost constraints, the stateof-the-ar...
An-Yeu Wu, K. J. Ray Liu, Arun Raghupathy, Shang-C...
84
Voted
CHI
2006
ACM
16 years 1 months ago
Whither or whether HCI: requirements analysis for multi-sited, multi-user cyberinfrastructures
Cyberinfrastructures bring together distributed resources to support scientific discoveries. Cyberinfrastructures currently under development are intended to enable the cooperativ...
Ann Zimmerman, Bonnie A. Nardi
DAC
2011
ACM
14 years 1 months ago
Characterizing within-die and die-to-die delay variations introduced by process variations and SOI history effect
Variations in delay caused by within-die and die-to-die process variations and SOI history effect increase timing margins and reduce performance. In order to develop mitigation te...
Jim Aarestad, Charles Lamech, Jim Plusquellic, Dhr...
GLVLSI
2008
IEEE
147views VLSI» more  GLVLSI 2008»
15 years 8 months ago
Statistical timing analysis of flip-flops considering codependent setup and hold times
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
Safar Hatami, Hamed Abrishami, Massoud Pedram