In this paper, we study the simultaneous buffer and wire sizing (SBWS) problem for delay and power dissipation minimization. We prove the BS/WS relation for optimal SBWS solutions...
In PRAM emulations, universal hashing is a well-known method for distributing the address space among memory modules. However, if the memory access patterns of an application ofte...
Recent results by Toda, Vinay, Damm, and Valiant have shown that the complexity of the determinant is characterized by the complexity of counting the number of accepting computati...
We extend results about heights of random trees (Devroye, 1986, 1987, 1998b). In this paper, a general split tree model is considered in which the normalized subtree sizes of node...
A model for the dynamic simulation of flexible bodies subject to non-penetration constraints is presented. Flexible bodies are described in terms of global deformations of a rest ...