A coarse-grain multithreaded processor can effectively hide long memory latencies by quickly switching to an alternate task when the active task issues a memory request, improving...
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
As high performance clusters continue to grow in size, the mean time between failure shrinks. Thus, the issues of fault tolerance and reliability are becoming one of the challengi...
—In this paper we study the influence of using hub nodes to relay messages in human-based delay tolerant networks (DTNs), by analyzing empirical traces obtained by human mobilit...
We study the multicast problem in wireless sensor networks, where the source can send data to a fixed number of destinations (actuators) at a different rate (multiratecast). A typi...