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» Concurrent Fault Detection in Random Combinational Logic
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ATS
2005
IEEE
132views Hardware» more  ATS 2005»
13 years 12 months ago
Concurrent Test Generation
We define a new type of test, called “concurrent test,” for a combinational circuit. Given a set of target faults, a concurrent-test is an input vector that detects all (or m...
Vishwani D. Agrawal, Alok S. Doshi
DSD
2010
IEEE
111views Hardware» more  DSD 2010»
13 years 4 months ago
Faults Coverage Improvement Based on Fault Simulation and Partial Duplication
— A method how to improve the coverage of single faults in combinational circuits is proposed. The method is based on Concurrent Error Detection, but uses a fault simulation to f...
Jaroslav Borecky, Martin Kohlik, Hana Kubatova, Pa...
CDES
2007
82views Hardware» more  CDES 2007»
13 years 7 months ago
Efficient Global Fault Collapsing for Combinational Library Modules
—Fault collapsing is the process of reducing the number of faults by using redundance and equivalence/dominance relationships among faults. Exact global fault collapsing can be e...
Hussain Al-Asaad
DFT
2008
IEEE
151views VLSI» more  DFT 2008»
13 years 8 months ago
Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller
This paper presents a concurrent error detection technique for the control logic of a modern microprocessor. Our method is based on execution time prediction for each instruction ...
Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris...
IJCSA
2007
101views more  IJCSA 2007»
13 years 6 months ago
Concurrent Error Detection in S-boxes
In this paper we present low -cost, concurrent checking methods for multiple error detection in S-boxes of symmetric block ciphers. These are redundancy-based fault detection sche...
Ewa Idzikowska, Krzysztof Bucholc