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FPGA
2000
ACM
122views FPGA» more  FPGA 2000»
15 years 10 months ago
A reconfigurable multi-function computing cache architecture
A considerable portion of a chip is dedicated to a cache memory in a modern microprocessor chip. However, some applications may not actively need all the cache storage, especially...
Huesung Kim, Arun K. Somani, Akhilesh Tyagi
EUROPAR
2010
Springer
15 years 6 months ago
Optimized On-Chip-Pipelined Mergesort on the Cell/B.E
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
Rikard Hultén, Christoph W. Kessler, Jö...
156
Voted
EUROPAR
2001
Springer
15 years 11 months ago
Building TMR-Based Reliable Servers Despite Bounded Input Lifetimes
This paper is on the construction of a server subsystem in a client/server system in an application context where the number of potential clients can be arbitrarily large. The imp...
Paul D. Ezhilchelvan, Jean-Michel Hélary, M...
BIRTHDAY
2005
Springer
15 years 8 months ago
History and Future of Implicit and Inductionless Induction: Beware the Old Jade and the Zombie!
Abstract. In this survey on implicit induction I recollect some memories on the history of implicit induction as it is relevant for future research on computer-assisted theorem pro...
Claus-Peter Wirth
CAP
2010
15 years 1 months ago
Parallel disk-based computation for large, monolithic binary decision diagrams
Binary Decision Diagrams (BDDs) are widely used in formal verification. They are also widely known for consuming large amounts of memory. For larger problems, a BDD computation wi...
Daniel Kunkle, Vlad Slavici, Gene Cooperman