Sciweavers

3616 search results - page 286 / 724
» Conditional Memory Ordering
Sort
View
DATE
2009
IEEE
138views Hardware» more  DATE 2009»
15 years 11 months ago
Cache aware compression for processor debug support
—During post-silicon processor debugging, we need to frequently capture and dump out the internal state of the processor. Since internal state constitutes all memory elements, th...
Anant Vishnoi, Preeti Ranjan Panda, M. Balakrishna...
IPPS
2007
IEEE
15 years 11 months ago
Code Compression and Decompression for Instruction Cell Based Reconfigurable Systems
Code compression has been applied to embedded systems to minimize the silicon area utilized for program memories, and lower the power consumption. More recently, it has become a n...
Nazish Aslam, Mark Milward, Ioannis Nousias, Tughr...
CIKM
2007
Springer
15 years 11 months ago
Index compression is good, especially for random access
Index compression techniques are known to substantially decrease the storage requirements of a text retrieval system. As a side-effect, they may increase its retrieval performanc...
Stefan Büttcher, Charles L. A. Clarke
LCPC
2007
Springer
15 years 11 months ago
A Novel Asynchronous Software Cache Implementation for the Cell-BE Processor
This paper describes the implementation of a runtime library for asynchronous communication in the Cell BE processor. The runtime library implementation provides with several servi...
Jairo Balart, Marc González, Xavier Martore...
133
Voted
IPPS
2006
IEEE
15 years 11 months ago
An experimental study of optimizing bioinformatics applications
As bioinformatics is an emerging application of high performance computing, this paper first evaluates the memory performance of several representative bioinformatics application...
Guangming Tan, Lin Xu, Shengzhong Feng, Ninghui Su...