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WOSP
2004
ACM
15 years 10 months ago
Early-stage performance modeling and its application for integrated embedded control software design
Most of current embedded control software (ECSW) development techniques deal only with performance specifications during the early software design phase and delay the modeling and...
Shige Wang, Kang G. Shin
SBCCI
2003
ACM
136views VLSI» more  SBCCI 2003»
15 years 10 months ago
SystemC and the Future of Design Languages: Opportunities for Users and Research
There has been a lot of discussion, and a lot of confusion, about the various existing and new design languages recently. SystemC, SystemVerilog, Verilog2005, e, Vera, PSL/Sugar, ...
Grant Martin
147
Voted
IPPS
2000
IEEE
15 years 9 months ago
Exploring the Switch Design Space in a CC-NUMA Multiprocessor Environment
The switch design for interconnection networks plays an important role in the overall performance of multiprocessors and computer networks. It is therefore crucial to study variou...
Marius Pirvu, Nan Ni, Laxmi N. Bhuyan
ICCAD
2010
IEEE
146views Hardware» more  ICCAD 2010»
15 years 2 months ago
Through-silicon-via management during 3D physical design: When to add and how many?
In 3D integrated circuits through silicon vias (TSVs) are used to connect different dies stacked on top of each other. These TSV occupy silicon area and have significantly larger a...
Mohit Pathak, Young-Joon Lee, Thomas Moon, Sung Ky...
DAC
2005
ACM
16 years 5 months ago
Logic block clustering of large designs for channel-width constrained FPGAs
In this paper we present a system level technique for mapping large, multiple-IP-block designs to channel-width constrained FPGAs. Most FPGA clustering tools [2, 3, 11] aim to red...
Marvin Tom, Guy G. Lemieux