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» Control Generation for Logic Programs
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SERP
2003
15 years 3 months ago
DPET - A Simple C++ Design Pattern Extraction Tool
Design patterns provide a medium-grained ion and can be used as an effective tool for understanding object-oriented systems. This paper presents a simple tool for the extraction o...
Samuel Ajila, Peng Xie
JOT
2008
200views more  JOT 2008»
15 years 1 months ago
Applying Model Checking to Concurrent UML Models
We present, in this paper, a framework supporting a formal verification of concurrent UML models using the Maude language. We consider both static and dynamic features of concurre...
Patrice Gagnon, Farid Mokhati, Mourad Badri
MEMOCODE
2010
IEEE
14 years 12 months ago
A formal executable semantics of Verilog
This paper describes a formal executable semantics for the Verilog hardware description language. The goal of our formalization is to provide a concise and mathematically rigorous...
Patrick O'Neil Meredith, Michael Katelman, Jos&eac...
CONIELECOMP
2006
IEEE
15 years 8 months ago
WISBuilder: A Framework for Facilitating Development of Web-Based Information Systems
This paper presents WISBuilder, a framework that investigates an approach for facilitating the development of Web-based Information Systems. The approach is based on the Model-Vie...
Angel Israel Ortiz-Cornejo, Heriberto Cuayá...
DSN
2005
IEEE
15 years 7 months ago
Authenticated System Calls
System call monitoring is a technique for detecting and controlling compromised applications by checking at runtime that each system call conforms to a policy that specifies the ...
Mohan Rajagopalan, Matti A. Hiltunen, Trevor Jim, ...