360 search results - page 14 / 72 » Control network generator for latency insensitive designs |
ISCA
2003
IEEE
15 years 2 months ago
2003
IEEE
Designing ASICs for each new generation of backbone routers is a time intensive and fiscally draining process. In this paper we focus on the design of a programmable architecture...
73
Voted
NOCS
2007
IEEE
15 years 3 months ago
2007
IEEE
Abstract – With the rise of multicore computing, the design of onchip networks (or networks on chip) has become an increasingly important component of computer architecture. The ...
ISORC
1999
IEEE
15 years 1 months ago
1999
IEEE
Designing distributed real-time systems as being composed of communicating objects offers many advantages with respect to modularity and extensibility of these systems. However, d...
74
Voted
IJCNN
2006
IEEE
15 years 3 months ago
2006
IEEE
—Static Var Compensator (SVC) are employed for providing better voltage regulation and transient stability especially for increased power transfer through the transmission lines....
94
Voted
IPSN
2010
Springer
14 years 7 months ago
2010
Springer
Traffic patterns in manufacturing machines exhibit strong temporal correlations due to the underlying repetitive nature of their operations. A MAC protocol can potentially learn t...