160 search results - page 15 / 32 » Cooperative Caching for Chip Multiprocessors |
106
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CASES
2000
ACM
15 years 6 months ago
2000
ACM
Increasing of computation needs and improving of processor integration make the mapping of embedded real-time applications more and more expensive. PROMPT [1] provides a new appro...
175
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ICPP
2009
IEEE
14 years 11 months ago
2009
IEEE
This paper evaluates several techniques to save leakage in CMP L2 caches by selectively switching off the less used lines. We primarily focus on private snoopy L2 caches. In this c...
118
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IEEEPACT
2009
IEEE
15 years 8 months ago
2009
IEEE
Translation Lookaside Buffers (TLBs) are a staple in modern computer systems and have a significant impact on overall system performance. Numerous prior studies have addressed TL...
114
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HPCA
2011
IEEE
14 years 5 months ago
2011
IEEE
Translation Lookaside Buffers (TLBs) are critical to processor performance. Much past research has addressed uniprocessor TLBs, lowering access times and miss rates. However, as c...
142
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DATE
2003
IEEE
15 years 7 months ago
2003
IEEE
Interconnect networks play a critical role in shared memory multiprocessor systems-on-chip (MPSoC) designs. MPSoC performance and power consumption are greatly affected by the pac...