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» Core-Selectability in Chip Multiprocessors
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ISCA
2012
IEEE
274views Hardware» more  ISCA 2012»
13 years 2 months ago
The dynamic granularity memory system
Chip multiprocessors enable continued performance scaling with increasingly many cores per chip. As the throughput of computation outpaces available memory bandwidth, however, the...
Doe Hyun Yoon, Min Kyu Jeong, Michael Sullivan, Ma...
JSA
2010
173views more  JSA 2010»
14 years 6 months ago
Hardware/software support for adaptive work-stealing in on-chip multiprocessor
During the past few years, embedded digital systems have been requested to provide a huge amount of processing power and functionality. A very likely foreseeable step to pursue th...
Quentin L. Meunier, Frédéric P&eacut...
85
Voted
VLSID
2008
IEEE
151views VLSI» more  VLSID 2008»
16 years 1 days ago
Predictable Implementation of Real-Time Applications on Multiprocessor Systems-on-Chip
Worst-case execution time (WCET) analysis and, in general, the predictability of real-time applications implemented on multiprocessor systems has been addressed only in very restri...
Alexandru Andrei, Petru Eles, Zebo Peng, Jakob Ros...
95
Voted
ICCD
2005
IEEE
97views Hardware» more  ICCD 2005»
15 years 8 months ago
Temperature-Sensitive Loop Parallelization for Chip Multiprocessors
In this paper, we present and evaluate three temperature-sensitive loop parallelization strategies for array-intensive applications executed on chip multiprocessors in order to re...
Sri Hari Krishna Narayanan, Guilin Chen, Mahmut T....
DAC
2001
ACM
16 years 19 days ago
Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip
We present a design flow for the generation of application-specific multiprocessor architectures. In the flow, architectural parameters are first extracted from a high-level syste...
Damien Lyonnard, Sungjoo Yoo, Amer Baghdadi, Ahmed...