548 search results - page 14 / 110 » Core-Selectability in Chip Multiprocessors |
ICS
2009
Tsinghua U.
15 years 6 months ago
2009
Tsinghua U.
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
ASPDAC
2007
ACM
15 years 3 months ago
2007
ACM
- It is attractive to use the OpenMP as a parallel programming model on a Multiprocessor System-On-Chip (MPSoC) because it is easy to write a parallel program in the OpenMP and the...
EUROPAR
2007
Springer
15 years 3 months ago
2007
Springer
How can sequential applications benefit from the ubiquitous next generation of chip multiprocessors (CMP)? Part of the answer may be a dynamic execution environment that automatica...
ASPDAC
2008
ACM
15 years 1 months ago
2008
ACM
Abstract-- We address performance maximization of independent task sets under energy constraint on chip multi-processor (CMP) architectures that support multiple voltage/frequency ...
IPPS
2007
IEEE
15 years 6 months ago
2007
IEEE
Power management is critical in server and high-performancecomputing environments as well as in mobile computing. Many mechanisms have been developed over recent years to support ...