For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...
— As nanometer technology advances, the post-CMP dielectric thickness variation control becomes crucial for manufacturing closure. To improve CMP quality, dummy feature filling ...
Today’s nanometer technology trends have a very negative impact on the reliability of semiconductor products. Intermittent faults constitute the largest part of reliability fail...
Nektarios Kranitis, Andreas Merentitis, N. Laoutar...
- For sub-90nm technology nodes and below, random fluctuations of within-die physical process properties are also known as random on-chip variation (OCV). It impacts on the VLSI/So...
Jun-Fu Huang, Victor C. Y. Chang, Sally Liu, Kelvi...