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» Customizable Data Distribution for Shared Data Spaces
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133
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ASPLOS
2011
ACM
14 years 4 months ago
ConSeq: detecting concurrency bugs through sequential errors
Concurrency bugs are caused by non-deterministic interleavings between shared memory accesses. Their effects propagate through data and control dependences until they cause softwa...
Wei Zhang, Junghee Lim, Ramya Olichandran, Joel Sc...
WWW
2005
ACM
16 years 1 months ago
A publish and subscribe collaboration architecture for web-based information
Markup languages, representations, schemas, and tools have significantly increased the ability for organizations to share their information. Languages, such as the Extensible Mark...
M. Brian Blake, David H. Fado, Gregory A. Mack
HPCA
2008
IEEE
16 years 1 months ago
An OS-based alternative to full hardware coherence on tiled CMPs
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
Christian Fensch, Marcelo Cintra
117
Voted
IPPS
2007
IEEE
15 years 7 months ago
A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
Ehsan Atoofian, Amirali Baniasadi
PDP
2007
IEEE
15 years 7 months ago
HAND: Highly Available Dynamic Deployment Infrastructure for Globus Toolkit 4
—Grid computing is becoming more and more attractive for coordinating large-scale heterogeneous resource sharing and problem solving. Of particular interest for effective Grid co...
Li Qi, Hai Jin, Ian T. Foster, Jarek Gawor