Application specific instruction-set processors combine an efficient general purpose core with special purpose functionality that is tailored to a particular application domain. ...
Uwe Kastens, Dinh Khoi Le, Adrian Slowik, Michael ...
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
Inlined Reference Monitor (IRM) is an established enforcement mechanism for history-based access control policies. IRM enforcement injects monitoring code into the binary of an un...
Existing task allocation algorithms generally do not consider the effects of task interaction, such as interference, but instead assume that tasks are independent. That assumptio...
The impossibility of statically determining the behavior of complex systems that interact at runtime with heterogeneous devices and remote entities, may lead to unexpected system ...