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190
Voted
ICRA
2000
IEEE
15 years 9 months ago
2000
IEEE
This paper describes the progress of the BIP2000 project. This project, in which four laboratories are involved for 4 years, as uimed at the realization of the lower part of an an...
171
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PDP
2008
IEEE
16 years 16 days ago
2008
IEEE
This paper presents QLSE (QoS-constrained List Scheduling hEuristics), a Quality of Service-based launch time scheduling algorithm for wide area Grids. QLSE considers applications...
167
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IPPS
2007
IEEE
16 years 13 days ago
2007
IEEE
Sparse linear solvers account for much of the execution time in many high-performance computing (HPC) applications, and not every solver works on all problems. Hence choosing a su...
177
Voted
IPPS
2007
IEEE
16 years 13 days ago
2007
IEEE
Implementing real-time video processing systems put high requirements on computation and memory performance. FPGAs have proven to be effective implementation architecture for thes...
135
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ICPP
2006
IEEE
16 years 5 days ago
2006
IEEE
Multi-lane vector processors achieve excellent computational throughput for programs with high data-level parallelism (DLP). However, application phases without significant DLP ar...