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116
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ICDCS
2008
IEEE
15 years 7 months ago
PFC: Transparent Optimization of Existing Prefetching Strategies for Multi-Level Storage Systems
The multi-level storage architecture has been widely adopted in servers and data centers. However, while prefetching has been shown as a crucial technique to exploit the sequentia...
Zhe Zhang, Kyuhyung Lee, Xiaosong Ma, Yuanyuan Zho...
112
Voted
MICRO
2003
IEEE
125views Hardware» more  MICRO 2003»
15 years 5 months ago
WaveScalar
Silicon technology will continue to provide an exponential increase in the availability of raw transistors. Effectively translating this resource into application performance, how...
Steven Swanson, Ken Michelson, Andrew Schwerin, Ma...
ASPLOS
1996
ACM
15 years 4 months ago
Shasta: A Low Overhead, Software-Only Approach for Supporting Fine-Grain Shared Memory
This paper describes Shasta, a system that supports a shared address space in software on clusters of computers with physically distributed memory. A unique aspect of Shasta compa...
Daniel J. Scales, Kourosh Gharachorloo, Chandramoh...
209
Voted
HIPEAC
2011
Springer
14 years 3 days ago
Decoupled zero-compressed memory
For each computer system generation, there are always applications or workloads for which the main memory size is the major limitation. On the other hand, in many cases, one could...
Julien Dusser, André Seznec
84
Voted
CSSE
2008
IEEE
15 years 7 months ago
Generation of Executable Representation for Processor Simulation with Dynamic Translation
Instruction-Set Simulators (ISS) are indispensable tools for studying new architectures. There are several alternatives to achieve instruction set simulation, such as interpretive...
Jiajia Song, HongWei Hao, Claude Helmstetter, Vani...