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IESS
2007
Springer
165views Hardware» more  IESS 2007»
15 years 5 months ago
Data Reuse Driven Memory and Network-On-Chip Co-Synthesis
NoCs present a possible communication infrastructure solution to deal with increased design complexity and shrinking time-to-market. The communication infrastructure is a signific...
Ilya Issenin, Nikil Dutt
VLSID
2000
IEEE
94views VLSI» more  VLSID 2000»
15 years 4 months ago
A Genetic Algorithm for the Synthesis of Structured Data Paths
The technique presented here achieves simultaneous optimization of schedule time and data path component cost within a structured data path architecture, using a genetic algorithm...
Chittaranjan A. Mandal, R. M. Zimmer
CAV
2010
Springer
192views Hardware» more  CAV 2010»
15 years 3 months ago
Invariant Synthesis for Programs Manipulating Lists with Unbounded Data
We address the issue of automatic invariant synthesis for sequential programs manipulating singly-linked lists carrying data over infinite data doe define for that a framework ba...
Ahmed Bouajjani, Cezara Dragoi, Constantin Enea, A...
CODES
2007
IEEE
15 years 6 months ago
Simultaneous synthesis of buses, data mapping and memory allocation for MPSoC
Heterogeneous multiprocessors are emerging as the dominant implementation approach to embedded multiprocessor systems. In addition to having processing elements suited to the targ...
Brett H. Meyer, Donald E. Thomas
VLSID
1996
IEEE
133views VLSI» more  VLSID 1996»
15 years 3 months ago
Allocation and Binding in Data Path Synthesis Using a Genetic Algorithm Approach
A technique for allocatzon and binding for data path synthesis (DPS) using a Genetic Algorithm (GA) approach has been developed. The proposed genetic algorithm uses a non-conventi...
Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy G...