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ICCAD
2003
IEEE
141views Hardware» more  ICCAD 2003»
15 years 8 months ago
Passive Synthesis of Compact Frequency-Dependent Interconnect Models via Quadrature Spectral Rules
In this paper, we present a reduced order inodeling methodology, based on the utilization of optimal non-uniform grids generated by Gaussian spectral rules, for the direct passive...
Traianos Yioultsis, Anne Woo, Andreas C. Cangellar...
CE
2007
100views more  CE 2007»
14 years 12 months ago
Educational resources and implementation of a Greek sign language synthesis architecture
In this paper, we present how creation and dynamic synthesis of linguistic resources of Greek Sign Language (GSL) may serve to support development and provide content to an educat...
Kostas Karpouzis, George Caridakis, Stavroula-Evit...
TOG
2008
107views more  TOG 2008»
14 years 11 months ago
Multiscale texture synthesis
Example-based texture synthesis algorithms have gained widespread popularity for their ability to take a single input image and create a perceptually similar non-periodic texture....
Charles Han, Eric Risser, Ravi Ramamoorthi, Eitan ...
CCE
2005
14 years 11 months ago
Logic-based outer approximation for globally optimal synthesis of process networks
Process network problems can be formulated as Generalized Disjunctive Programs where a logicbased representation is used to deal with the discrete and continuous decisions. A new ...
María Lorena Bergamini, Pío A. Aguir...
ICCAD
2007
IEEE
87views Hardware» more  ICCAD 2007»
15 years 8 months ago
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
Philip Brisk, Ajay K. Verma, Paolo Ienne