When a system fails to satisfy its specification, the model checker produces an error trace (or counter-example) that demonstrates an undesirable behavior, which is then used in d...
Among the many stages of a simulation study, debugging a simulation model is the one that is hardly reported on but that may consume a considerable amount of time and effort. In t...
Abstract. In the business process management community, transformations for process models are usually programmed using imperative languages (such as Java). The underlying mapping ...
We have been using the concept map of the domain, enhanced with pedagogical concepts called learning objectives, as the overlay student model in our intelligent tutors for program...
We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program ...