568 search results - page 41 / 114 » Decoupled Hardware Support for Distributed Shared Memory |
101
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ISPASS
2007
IEEE
15 years 6 months ago
2007
IEEE
Address re-mapping techniques in so-called active memory systems have been shown to dramatically increase the performance of applications with poor cache and/or communication beha...
DATE
2010
IEEE
15 years 4 months ago
2010
IEEE
Abstract—Cyber-Physical Systems require distributed architectures to support safety critical real-time control. Kopetz’ Time-Triggered Architectures (TTA) have been proposed as...
120
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PPOPP
2006
ACM
15 years 5 months ago
2006
ACM
We investigate a transactional memory runtime system providing scaling and strong consistency for generic C++ and SQL applications on commodity clusters. We introduce a novel page...
HPCA
2008
IEEE
16 years 4 days ago
2008
IEEE
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
107
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PPOPP
2003
ACM
15 years 5 months ago
2003
ACM
InterWeave is a distributed middleware system that supports the sharing of strongly typed, pointer-rich data structures across a wide variety of hardware architectures, operating ...