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» Decoupled Hardware Support for Distributed Shared Memory
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DATE
2006
IEEE
87views Hardware» more  DATE 2006»
15 years 5 months ago
Supporting task migration in multi-processor systems-on-chip: a feasibility study
With the advent of multi-processor systems-on-chip, the interest in process migration is again on the rise both in research and in product development. New challenges associated w...
Stefano Bertozzi, Andrea Acquaviva, Davide Bertozz...
IWMM
1998
Springer
153views Hardware» more  IWMM 1998»
15 years 4 months ago
Compiler Support to Customize the Mark and Sweep Algorithm
Mark and sweep garbage collectors (GC) are classical but still very efficient automatic memory management systems. Although challenged by other kinds of systems, such as copying c...
Dominique Colnet, Philippe Coucaud, Olivier Zendra
DSRT
1999
IEEE
15 years 4 months ago
Distributed Interaction in Virtual Spaces
Virtual spaces based on the metaphor of "shared network places" are becoming a well accepted implementation approach for multiuser, multimedia, distributed cooperative w...
Alois Ferscha, James Johnson
PPOPP
2009
ACM
16 years 11 days ago
An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
Seunghwa Kang, David A. Bader
IEEEPACT
2007
IEEE
15 years 6 months ago
The OpenTM Transactional Application Programming Interface
Transactional Memory (TM) simplifies parallel programming by supporting atomic and isolated execution of user-identified tasks. To date, TM programming has required the use of l...
Woongki Baek, Chi Cao Minh, Martin Trautmann, Chri...