Sciweavers

568 search results - page 93 / 114
» Decoupled Hardware Support for Distributed Shared Memory
Sort
View
IPPS
2007
IEEE
15 years 6 months ago
A Power-Aware Prediction-Based Cache Coherence Protocol for Chip Multiprocessors
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
Ehsan Atoofian, Amirali Baniasadi
HPDC
2010
IEEE
15 years 29 days ago
XCo: explicit coordination to prevent network fabric congestion in cloud computing cluster platforms
Large cluster-based cloud computing platforms increasingly use commodity Ethernet technologies, such as Gigabit Ethernet, 10GigE, and Fibre Channel over Ethernet (FCoE), for intra...
Vijay Shankar Rajanna, Smit Shah 0002, Anand Jahag...
HPCA
2000
IEEE
15 years 4 months ago
Improving the Throughput of Synchronization by Insertion of Delays
Efficiency of synchronization mechanisms can limit the parallel performance of many shared-memory applications. In addition, the ever increasing performance gap between processor...
Ravi Rajwar, Alain Kägi, James R. Goodman
CLUSTER
2006
IEEE
15 years 3 months ago
An Integrated Adaptive Management System for Cluster-based Web Services
The complexity of the cluster-based web service challenges the traditional approaches, which fail to guarantee the reliability and real-time performance required. In this paper, w...
Ying Jiang, Dan Meng, Chao Ren, Jianfeng Zhan
ACMMSP
2006
ACM
260views Hardware» more  ACMMSP 2006»
15 years 5 months ago
Seven at one stroke: results from a cache-oblivious paradigm for scalable matrix algorithms
A blossoming paradigm for block-recursive matrix algorithms is presented that, at once, attains excellent performance measured by • time, • TLB misses, • L1 misses, • L2 m...
Michael D. Adams, David S. Wise