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RTAS
1997
IEEE
15 years 2 months ago
Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
Sung-Whan Moon, Kang G. Shin, Jennifer Rexford
DAC
1997
ACM
15 years 1 months ago
COSYN: Hardware-Software Co-Synthesis of Embedded Systems
: Hardware-software co-synthesis is the process of partitioning an embedded system specification into hardware and software modules to meet performance, power and cost goals. In t...
Bharat P. Dave, Ganesh Lakshminarayana, Niraj K. J...
SIGCOMM
1997
ACM
15 years 1 months ago
Dynamics of Random Early Detection
In this paper we evaluate the effectiveness of Random Early Detection (RED) over traffic types categorized as nonadaptive, fragile and robust, according to their responses to con...
Dong Lin, Robert Morris
SIGMOD
1997
ACM
166views Database» more  SIGMOD 1997»
15 years 1 months ago
The InfoSleuth Project
The goal of the InfoSleuth project at MCC is to exploit and synthesize new technologies into a uni ed system that retrieves and processes information in an ever-changing network o...
Roberto J. Bayardo Jr., William Bohrer, Richard S....
SPAA
1997
ACM
15 years 1 months ago
Pipelining with Futures
Pipelining has been used in the design of many PRAM algorithms to reduce their asymptotic running time. Paul, Vishkin, and Wagener (PVW) used the approach in a parallel implementat...
Guy E. Blelloch, Margaret Reid-Miller
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