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» Design, Implementation and Performance Evaluation of IP-VPN
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ISCA
2006
IEEE
142views Hardware» more  ISCA 2006»
16 years 4 days ago
Bulk Disambiguation of Speculative Threads in Multiprocessors
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
Luis Ceze, James Tuck, Josep Torrellas, Calin Casc...
279
Voted
SIGMOD
2006
ACM
232views Database» more  SIGMOD 2006»
16 years 6 months ago
High-performance complex event processing over streams
In this paper, we present the design, implementation, and evaluation of a system that executes complex event queries over real-time streams of RFID readings encoded as events. The...
Eugene Wu 0002, Yanlei Diao, Shariq Rizvi
141
Voted
ICCD
2003
IEEE
121views Hardware» more  ICCD 2003»
16 years 3 months ago
Distributed Reorder Buffer Schemes for Low Power
We consider several approaches for reducing the complexity and power dissipation in processors that use separate register file to maintain the commited register values. The first ...
Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad ...
156
Voted
IPPS
2007
IEEE
16 years 13 days ago
Securing Grid Data Transfer Services with Active Network Portals
Widely available and utilized Grid servers are vulnerable to a variety of threats from Denial of Service (DoS) attacks, overloading caused by flash crowds, and compromised client ...
Onur Demir, Michael R. Head, Kanad Ghose, Madhusud...
171
Voted
CASES
2005
ACM
15 years 8 months ago
SECA: security-enhanced communication architecture
In this work, we propose and investigate the idea of enhancing a System-on-Chip (SoC) communication architecture (the fabric that integrates system components and carries the comm...
Joel Coburn, Srivaths Ravi, Anand Raghunathan, Sri...