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SBACPAD
2007
IEEE
130views Hardware» more  SBACPAD 2007»
15 years 6 months ago
Design of a Feasible On-Chip Interconnection Network for a Chip Multiprocessor (CMP)
In this paper, an adaptive wormhole router for a flexible on-chip interconnection network is proposed and implemented for a Chip-Multi Processor (CMP). It adopts a wormhole switc...
Seung Eun Lee, Jun Ho Bahn, Nader Bagherzadeh
92
Voted
EIT
2008
IEEE
15 years 2 months ago
Design and analysis of efficient reconfigurable wavelet filters
Abstract--Real-time image and multimedia processing applications such as video surveillance and telemedicine can have dynamic requirements of system latency, throughput, and power ...
Amit Pande, Joseph Zambreno
95
Voted
IPPS
2007
IEEE
15 years 6 months ago
CCA-LISI: On Designing A CCA Parallel Sparse Linear Solver Interface
Sparse linear solvers account for much of the execution time in many high-performance computing (HPC) applications, and not every solver works on all problems. Hence choosing a su...
Fang Liu, Randall Bramley
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
15 years 6 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
ICPP
2007
IEEE
15 years 6 months ago
Mercury: Combining Performance with Dependability Using Self-virtualization
There has recently been increasing interests in using system virtualization to improve the dependability of HPC cluster systems. However, it is not cost-free and may come with som...
Haibo Chen, Rong Chen, Fengzhe Zhang, Binyu Zang, ...