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INFOCOM
2007
IEEE
15 years 10 months ago
Iterative Scheduling Algorithms
— The input-queued switch architecture is widely used in Internet routers due to its ability to run at very high line speeds. A central problem in designing an input-queued switc...
Mohsen Bayati, Balaji Prabhakar, Devavrat Shah, Ma...
USENIX
1993
15 years 5 months ago
Exploiting In-Kernel Data Paths to Improve I/O Throughput and CPU Availability
We present the motivation, design, implementation, and performance evaluation of a UNIX kernel mechanism capable of establishing fast in-kernel data pathways between I/O objects. ...
Kevin R. Fall, Joseph Pasquale
VLSID
2009
IEEE
170views VLSI» more  VLSID 2009»
16 years 5 months ago
Code Transformations for TLB Power Reduction
The Translation Look-aside Buffer (TLB) is a very important part in the hardware support for virtual memory management implementation of high performance embedded systems. The TLB...
Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivasta...
IJNSEC
2008
103views more  IJNSEC 2008»
15 years 4 months ago
On Cipher Design Based on Switchable Controlled Operations
This paper concerns the problem of reducing the implementation cost of the switchable data-dependent operations (SDDOs) that are a new cryptographic primitive oriented to the desi...
Nikolay A. Moldovyan

Publication
184views
17 years 2 months ago
Design and Evaluation of Feedback Consolidation for ABR Point-to-Multipoint Connections in ATM Networks
The available bit rate (ABR) service is proposed to transport data traffic in asynchronous transfer mode (ATM) networks. ABR is unique because the network switches can indicate to ...
Sonia Fahmy, Raj Jain, Rohit Goyal, Bobby Vandalor...