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» Design Challenges for New Application-Specific Processors
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LCTRTS
2007
Springer
15 years 3 months ago
Enabling compiler flow for embedded VLIW DSP processors with distributed register files
High-performance and low-power VLIW DSP processors are increasingly deployed on embedded devices to process video and multimedia applications. For reducing power and cost in desig...
Chung-Kai Chen, Ling-Hua Tseng, Shih-Chang Chen, Y...
RTCSA
2006
IEEE
15 years 3 months ago
Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors
To support high-performance and low-power for multimedia applications and for hand-held devices, embedded VLIW DSP processors are of research focus. With the tight resource constr...
Chi Wu, Kun-Yuan Hsieh, Yung-Chia Lin, Chung-Ju Wu...
DAC
1996
ACM
15 years 1 months ago
FADIC: Architectural Synthesis applied in IC Design
This paper discusses the design of a chip using architectural synthesis. The chip, FADIC, is applied in Digital Audio Broadcasting (DAB) receivers. It shows that architectural syn...
J. Huisken, F. Welten
ASAP
1997
IEEE
156views Hardware» more  ASAP 1997»
15 years 1 months ago
Design methodology for digital signal processing
Improvements in semiconductor integration density and the resulting problem of having to manage designs of increasing complexity is an old one, but still current. The new challeng...
Gerhard Fettweis
ASPLOS
2011
ACM
14 years 1 months ago
DoublePlay: parallelizing sequential logging and replay
Deterministic replay systems record and reproduce the execution of a hardware or software system. In contrast to replaying execution on uniprocessors, deterministic replay on mult...
Kaushik Veeraraghavan, Dongyoon Lee, Benjamin West...