124 search results - page 3 / 25 » Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digi... |
TE
2010
13 years 29 days ago
2010
Abstract--As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used i...
ASPDAC
2001
ACM
13 years 10 months ago
2001
ACM
Asynchronous, self-timed, logic is often eschewed in digital design because of its ad-hoc methodologies and lack of available design tools. This paper describes a complete High Le...
GECCO
2007
Springer
14 years 12 days ago
2007
Springer
This paper shows that the evolutionary design of digital circuits which is conducted at the gate level is able to produce human-competitive circuits at the transistor level. In ad...
DATE
2009
IEEE
13 years 10 months ago
2009
IEEE
Subthreshold logic is showing good promise as a viable ultra-low-power circuit design technique for powerlimited applications. For this design technique to gain widespread adoption...
CORR
2010
Springer
13 years 1 months ago
2010
Springer
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its correspon...