Sciweavers

473 search results - page 14 / 95
» Design Methodologies for Noise in Digital Integrated Circuit...
Sort
View
GI
2004
Springer
15 years 5 months ago
Towards a Framework and a Design Methodology for Autonomic Integrated Systems
: The transition from microelectronics to nanoelectronics reaches physical limits and results in a paradigm shift in the design and fabrication of electronic circuits. The conserva...
Andreas Herkersdorf, Wolfgang Rosenstiel
TE
2010
104views more  TE 2010»
14 years 6 months ago
Integrating Asynchronous Digital Design Into the Computer Engineering Curriculum
Abstract--As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used i...
Scott C. Smith, Waleed Al-Assadi, Jia Di
ICTAI
2002
IEEE
15 years 4 months ago
A Genetic Testing Framework for Digital Integrated Circuits
In order to reduce the time-to-market and simplify gatelevel test generation for digital integrated circuits, GAbased functional test generation techniques are proposed for behavi...
Xiaoming Yu, Alessandro Fin, Franco Fummi, Elizabe...
EH
2000
IEEE
123views Hardware» more  EH 2000»
15 years 4 months ago
The Test Vector Problem and Limitations to Evolving Digital Circuits
How do we know the correctness of an evolved circuit? While Evolutionary Hardware is exhibiting its effectiveness, we argue that it is very difficult to design a large-scale digit...
Kosuke Imamura, James A. Foster, Axel W. Krings
ICCD
1997
IEEE
87views Hardware» more  ICCD 1997»
15 years 4 months ago
Synthesizing Iterative Functions into Delay-Insensitive Tree Circuits
Speed, cost and correctness may be the most important factors in designing a digital system. This paper proposes a novel and general methodology to synthesize iterative functions ...
Fu-Chiung Cheng