473 search results - page 37 / 95 » Design Methodologies for Noise in Digital Integrated Circuit... |
DAC
2009
ACM
15 years 6 months ago
2009
ACM
This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance mono...
GLVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
Regularly structured design techniques can combat complexity on a variety of fronts. We present the Structured and Tuned Array Generation (STAG) design methodology, which provides...
ICIP
2008
IEEE
16 years 1 months ago
2008
IEEE
The continual shrinkage of minimum feature size in integrated circuit (IC) fabrication incurs more and more serious distortion in the optical lithography process, generating circu...
GLVLSI
2005
IEEE
15 years 5 months ago
2005
IEEE
This paper presents a fully integrated 1-V, dual band, fastlocked frequency synthesizer for IEEE 802.11 a/b/g WLAN applications. It can synthesize frequencies in the range of 2.4 ...
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ASPDAC
2010
ACM
14 years 10 months ago
2010
ACM
The concept of having an integrated circuit (IC) generate its own unique digital signature has broad application in areas such as embedded systems security, and IP/IC counterpiracy...