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VLSID
2002
IEEE
189views VLSI» more  VLSID 2002»
16 years 4 days ago
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language
Verification is one of the most complex and expensive tasks in the current Systems-on-Chip (SOC) design process. Many existing approaches employ a bottom-up approach to pipeline v...
Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, ...
DATE
2005
IEEE
115views Hardware» more  DATE 2005»
15 years 5 months ago
Functional Coverage Driven Test Generation for Validation of Pipelined Processors
Functional verification of microprocessors is one of the most complex and expensive tasks in the current system-on-chip design process. A significant bottleneck in the validatio...
Prabhat Mishra, Nikil D. Dutt
83
Voted
CAISE
2006
Springer
15 years 3 months ago
A Pattern for Designing Distributed Heterogeneous Ontologies for Facilitating Application Interoperability
The role of ontologies in knowledge base systems is gradually increasing. Along with the growth of Internet based applications and ecommerce, the need for easy interoperability bet...
M. Chenine, Vandana Kabilan, M. Garcia Lozano
SIGGRAPH
1994
ACM
15 years 3 months ago
Priority rendering with a virtual reality address recalculation pipeline
Virtual reality systems are placing never before seen demands on computer graphics hardware, yet few graphics systems are designed specifically for virtual reality. An address rec...
Matthew Regan, Ronald Pose
CODES
2003
IEEE
15 years 5 months ago
Deriving process networks from weakly dynamic applications in system-level design
We present an approach to the automatic derivation of executable Process Network specifications from Weakly Dynamic Applications. We introduce the notions of Dynamic Single Assig...
Todor Stefanov, Ed F. Deprettere