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» Design Productivity for Configurable Computing
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DAC
2004
ACM
16 years 2 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
DAC
2008
ACM
16 years 3 months ago
DVFS in loop accelerators using BLADES
Hardware accelerators are common in embedded systems that have high performance requirements but must still operate within stringent energy constraints. To facilitate short time-t...
Ganesh S. Dasika, Shidhartha Das, Kevin Fan, Scott...
136
Voted
IIE
2007
85views more  IIE 2007»
15 years 1 months ago
Half-Baked Logo Microworlds as Boundary Objects in Integrated Design
The paper addresses the problem of fragmentation of the communities involved in the design of digital media for education. It draws on the experience gained at the Educational Tec...
Chronis Kynigos
ARITH
2009
IEEE
15 years 8 months ago
Higher Radix Squaring Operations Employing Left-to-Right Dual Recoding
We introduce a novel left-to-right leading digit first dual recoding of an operand for the purpose of designing the squaring operation on that operand. Our dual recoding yields an...
David W. Matula
DAC
1996
ACM
15 years 6 months ago
RTL Emulation: The Next Leap in System Verification
ion. Production use of text-based methodology has enabled designers to capture designs of hundreds of thousands of gates using graphic ESDA tools. Source: Data Quest (Verilog/VHDL ...
Sanjay Sawant, Paul Giordano