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» Design and Implementation of the TRIPS Primary Memory System
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ASPDAC
2010
ACM
137views Hardware» more  ASPDAC 2010»
14 years 10 months ago
Improved on-chip router analytical power and area modeling
Over the course of this decade, uniprocessor chips have given way to multi-core chips which have become the primary building blocks of today's computer systems. The presence o...
Andrew B. Kahng, Bill Lin, Kambiz Samadi
EUROMICRO
2002
IEEE
15 years 4 months ago
Performance Tradeoffs for Static Allocation of Zero-Copy Buffers
Internet services like the world-wide web and multimedia applications like News- and Video-on-Demand have become very popular over the last years. Due to the large number of users ...
Pål Halvorsen, Espen Jorde, Karl-André...
DATE
2006
IEEE
95views Hardware» more  DATE 2006»
15 years 3 months ago
Dynamic data type refinement methodology for systematic performance-energy design exploration of network applications
Network applications are becoming increasingly popular in the embedded systems domain requiring high performance, which leads to high energy consumption. In networks is observed t...
Alexandros Bartzas, Stylianos Mamagkakis, Georgios...
SIGCOMM
2012
ACM
13 years 2 months ago
HyperDex: a distributed, searchable key-value store
Distributed key-value stores are now a standard component of high-performance web services and cloud computing applications. While key-value stores offer significant performance...
Robert Escriva, Bernard Wong, Emin Gün Sirer
GLOBECOM
2007
IEEE
15 years 6 months ago
A 10-Gbps High-Speed Single-Chip Network Intrusion Detection and Prevention System
Abstract—Network Intrusion Detection and Prevention Systems (NIDPSs) are vital in the fight against network intrusions. NIDPSs search for certain malicious content in network tr...
N. Sertac Artan, Rajdip Ghosh, Yanchuan Guo, H. Jo...