7530 search results - page 1420 / 1506 » Design and Implementation of the YAWL System |
FPGA
1995
ACM
15 years 1 months ago
1995
ACM
During the development of computer peripherals which interface to the processor via the system bus it is often necessary to acquire the signals on the bus at the hardware level. I...
EDBT
2010
ACM
15 years 1 months ago
2010
ACM
MapReduce and stream processing are two emerging, but different, paradigms for analyzing, processing and making sense of large volumes of modern day data. While MapReduce offers t...
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ICS
2010
Tsinghua U.
15 years 9 days ago
2010
Tsinghua U.
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...
USENIX
2007
15 years 5 days ago
2007
Virtual machine (VM) memory allocation and VM consolidation can benefit from the prediction of VM page miss rate at each candidate memory size. Such prediction is challenging for...
USENIX
2007
15 years 5 days ago
2007
Data Structure Abstractions for Asynchronous Web Applications Daniel S. Myers MIT CSAIL Jennifer N. Carlisle MIT CSAIL James A. Cowling MIT CSAIL Barbara H. Liskov MIT CSAIL The c...