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» Design and Performance of Optimized Relay Mappings
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ASPDAC
2005
ACM
102views Hardware» more  ASPDAC 2005»
14 years 11 months ago
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
Oliver Schliebusch, Anupam Chattopadhyay, David Ka...
PLDI
2009
ACM
15 years 4 months ago
Binary analysis for measurement and attribution of program performance
Modern programs frequently employ sophisticated modular designs. As a result, performance problems cannot be identified from costs attributed to routines in isolation; understand...
Nathan R. Tallent, John M. Mellor-Crummey, Michael...
SAC
2004
ACM
15 years 3 months ago
An optimized approach for KNN text categorization using P-trees
The importance of text mining stems from the availability of huge volumes of text databases holding a wealth of valuable information that needs to be mined. Text categorization is...
Imad Rahal, William Perrizo
ICASSP
2011
IEEE
14 years 1 months ago
A methodology based on Transportation problem modeling for designing parallel interleaver architectures
For high-data-rate applications, turbo-like iterative decoders are implemented with parallel hardware architecture. However, to achieve high throughput, concurrent accesses to each...
Awais Sani, Philippe Coussy, Cyrille Chavet, Eric ...
CODES
2011
IEEE
13 years 9 months ago
Analysis and optimization of fault-tolerant task scheduling on multiprocessor embedded systems
Reliability is a major requirement for most safety-related systems. To meet this requirement, fault-tolerant techniques such as hardware replication and software re-execution are ...
Jia Huang, Jan Olaf Blech, Andreas Raabe, Christia...